Graph processing has attracted a lot of attention for data analytics because graphs naturally represent the datasets of many applications. Examples include social networks, cybersecurity, and machine learning. The exponential growth of the data from these applications created a pressing need for high-performance graph processing frameworks.
With its massive parallelism and energy efficiency, FPGA is becoming attractive hardware for accelerating graph processing. In this talk, I will present ThunderGP, an efficient graph processing framework on HLS-based FPGAs, which enables data scientists to enjoy the performance of FPGA-based graph processing without compromising programmability.
Two aspects make the ThunderGP deliver superior performance. On the one hand, ThunderGP embraces an improved execution flow to better exploit the pipeline parallelism of FPGA and alleviate the data access amount to the global memory. On the other hand, the memory accesses are highly optimized to fully utilize the memory bandwidth capacity of the hardware platforms.
Xinyu Chen is a third-year Ph.D. student at NUS working with Prof. Bingsheng He and Prof. Weng-Fai Wong. His research interests include FPGA-based hardware accelerator, hardware-software co-design, and database systems.