Graph processing has been widely-used in many real-world scenarios. It is notoriously challenging to accelerate graph processing applications due to its well-known random memory access patterns. In this talk, I will introduce an ambitious project in China for building a graph processing computer, funded by the National Key Research and Development Program of China. We characterize some typical memory behaviors of graph processing, and rethink their architectural designs for improving memory-efficient parallelism, particularly in terms of edge parallelization. I will also introduce some industrial user cases, such as financial anti-fraud application from Ping An Technology Co. LTD, and Power and state estimation from State Grid Co. of China. Our graph accelerator can boost their performance significantly.
Long Zheng is an associate professor at Huazhong University of Science and Technology (HUST). He received his Ph.D. degree in computer architecture from HUST in 2016. Long has published over 30 research papers on many prestigious conferences and journals, including USENIX ATC, PACT, CGO, ICDCS, IPDPS, ACM TACO, and TPDS. He won a Best Paper Candidate in PACT 2018 and was also awarded the Best Presentation Award from CGO 2015. He has served as a guest editor board of CCF Transactions on High-Performance Computing. His current research interests include reconfigurable architecture, runtime system, and parallel programming.